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MoeIcenowy | should we have something that reduces the DRAM's rank for LiteDRAM? | 03:54 |
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MoeIcenowy | STLV7325's DRAM slot is wired with 2R capability, but the SODIMM module shipped with it is only 1R | 03:55 |
cr1901 | https://www.aliexpress.us/item/3256801088848039.html Hmmm, this isn't a bad price, considering the FPGA itself is worth over $1k ._. | 04:29 |
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MoeIcenowy | cr1901: oops aliexpress do not allow viewing w/o login | 06:36 |
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somlo | MoeIcenowy, cr1901: it might be a geo-location thing; I can view that link w/o logging in with no trouble | 11:36 |
somlo | that's the stlv7325-v2 I just bought; so far I can confirm the built-in 1G ddr sodimm, uart, and sdcard work great with litex | 11:37 |
somlo | the rj45 rgmii ethernet works in test-mode with the designer-provided bitstream, but no joy with liteeth (yet) | 11:38 |
somlo | also no joy with the built-in sata port | 11:38 |
somlo | seller promised schematics "soon", hoping to learn more once I get those :) | 11:39 |
somlo | I have a partial platform and target for it, and am preparing a litex-boards PR | 11:41 |
MoeIcenowy | somlo: well maybe I was detected to be in China | 13:48 |
MoeIcenowy | somlo: did you tested UDP with the test bitstream? | 13:48 |
MoeIcenowy | the two LEDs on the board is just the PHY LEDs | 13:48 |
MoeIcenowy | with the IP addresses and MAC address described in the document | 13:48 |
MoeIcenowy | the board will try to loopback UDP packets | 13:49 |
MoeIcenowy | somlo: how about GMII one? | 13:49 |
MoeIcenowy | (BTW I am also considering to re-buy a stlv7325 v2, this time with FMC | 13:50 |
somlo | MoeIcenowy: I am planning to find an rj45 sfp to test the sfp slots as well at some point in the immediate future (just need to drive into the office and dig around my junk drawer(s) :) | 14:13 |
somlo | but with seller-provided rgmii (A and B) bitstream, I can see the board generate traffic on the network by running wireshark on the other end, no need to look for blinky LEDs | 14:13 |
somlo | LMK if you're going to get a v2, and I'll push my (partial) platform file to github so we can work on it together :) | 14:14 |
somlo | and yeah, the one I ordered did come with an FMC connector (for a small extra charge, true, but worth keeping options open for the future) | 14:16 |
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MoeIcenowy | somlo: I didn't buy mine v1 with FMC | 15:22 |
MoeIcenowy | so it's why I am considering rebuying | 15:22 |
MoeIcenowy | well I never tried my SFP... | 16:41 |
MoeIcenowy | maybe I should try to grab some GbE SFP modules (because LiteETH does not support 10GE) | 16:42 |
cr1901 | MoeIcenowy: The ali express page was a link to the board you mentioned (STLV732) | 16:42 |
MoeIcenowy | cr1901: okay | 16:42 |
cr1901 | was curious what type of board it was/how much it cost | 16:42 |
MoeIcenowy | decent for a quad core rocket ;-) | 16:42 |
cr1901 | It is $200-something, while the FPGA on the STLV732 costs $1000+ alone... huh... | 16:43 |
MoeIcenowy | well the price of FPGAs are just not reasonable at all | 16:43 |
cr1901 | You can't even get them | 16:43 |
cr1901 | FPGAs don't exist anymore thanks to the parts shortage. Once we exhaust the remaining supply, that's it :) | 16:44 |
* cr1901 is joking, but the parts shortage _is_ bad | 16:44 | |
MoeIcenowy | well I remember the price of STM32F103 is driven to more than CNY100 | 16:45 |
MoeIcenowy | btw such chips may be refurbished or bought from some FPGA mass customers (thus it has a low price, and sometimes the code on the package is masked out for hiding who the chip is bought from) | 16:47 |
MoeIcenowy | for the price of refurbished FPGAs... remember EBAZ4205? ;-) | 16:47 |
cr1901 | . remember EBAZ4205 <-- I don't :o | 17:01 |
cr1901 | Looks like a BTC miner card from back when FPGA mining was feasible | 17:02 |
cr1901 | But my own experience is that FPGA miners were absolute shit quality even when FPGA mining was feasible (Butterfly Labs) | 17:02 |
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zyp | cr1901, it's not for FPGA mining, it's for managing mining ASICs | 19:19 |
cr1901 | ahhh oops | 19:30 |
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somlo | got rgmii ethernet working on the stlv7325-v2; needed to adjust tx_ and rx_delay (to 1e-9) when configuring the PHY in the target file | 21:55 |
somlo | so all I've got left to figure out is sata | 21:56 |
somlo | https://github.com/gsomlo/litex-boards/tree/gls-stlv7325-v2 | 22:18 |
somlo | successfully tested rj45, sdcard, ram, and uart | 22:19 |
somlo | sata not yet working | 22:19 |
somlo | other connectors (fmc, hdmi, sfp, and others) not tested | 22:19 |
somlo | will submit PR once i get sata working, the rest is less of a big deal for my use case :) | 22:20 |
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