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| _florent_ | I just update the Discord invitation link to make it permanent: https://discord.gg/PkJwjDbxeG (but I don't think the previous one was expired) | 08:03 |
|---|---|---|
| tpb | Title: LiteX (at discord.gg) | 08:03 |
| cr1901 | Will there be a bridge to IRC? | 08:10 |
| cr1901 | The discord-irc node package works fine IME, but I don't have a server to put it on | 08:10 |
| _florent_ | cr1901: I need to setup a server yes, probably on a Rapsberry Pi first, it would be fun to try to run it on Linux-on-LiteX-VexRiscv after :) | 08:20 |
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| MoeIcenowy | somlo: okay I switched back to STLV7325 and SDCard with Rocket seems to work | 09:45 |
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| somlo | _florent_: you could always run it on Fedora ;) | 11:45 |
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| geertu | somlo: Current litex-rebase hangs when starting userspace on my OrangeCrab, litex-rebase^ boots into userspace | 18:24 |
| geertu | somlo: overriding the return value of platform_get_irq_optional() to zero to force polling makes it work again | 18:42 |
| geertu | somlo: Always doing the timer setup in liteuart_startup() also makes it work | 18:55 |
| geertu | Looks like the liteuart interrupt never fires: | 18:56 |
| geertu | # cat /proc/interrupts | 18:56 |
| geertu | CPU0 | 18:56 |
| geertu | 2: 0 SiFive PLIC 0 Edge liteuart | 18:56 |
| geertu | 3: 0 litex-gpio 2 Edge C | 18:56 |
| geertu | 4: 0 litex-gpio 1 Edge B | 18:56 |
| geertu | 5: 42670 RISC-V INTC 5 Edge riscv-timer | 18:56 |
| geertu | 6: 0 litex-gpio 0 Edge A | 18:56 |
| geertu | A, B, and C are the GPIO switches on the Adafruit OLED Featherwing (https://www.adafruit.com/product/3045), which I also never got to work. | 18:57 |
| somlo | geertu: so maybe the way the liteuart irq line is wired into the rest of the SoC is buggy in some way ? | 18:57 |
| geertu | Perhaps there's an interrupt routing problem on OrangeCrab? | 18:57 |
| somlo | yeah... so if you omit the liteuart irq from DT it should default to polling -- as a first-pass band aid | 18:58 |
| somlo | having an irq number in DT wasn't doing anything before, anyway :) | 18:58 |
| somlo | but LMK if you end up thinking it's a regression in the linux driver updates I'm working on... | 18:59 |
| somlo | also (low likelihood, but since we're brainstorming) -- on Rocket I have to add 1 to each irq number generated by litex_json2dts_linux.py | 19:01 |
| somlo | so maybe the actual irq number you have is off-by-one? | 19:02 |
| somlo | like I said, grasping at straws, but might be worth ruling out :) | 19:02 |
| geertu | somlo: You mean the interrupts to the PLIC? | 19:06 |
| geertu | (thinking about adding the 1 inside Linux instead of flashing a new dtb) | 19:06 |
| geertu | somlo: Do you know why Rocket has that issue? And why it wasn't fixed properly? | 19:08 |
| somlo | so the "raw" litex IRQs are what they are, but I think inside the Rocket "box" (it also calls itself SoC :) there's a PLIC, and it reserves zero for itself or something (I am fuzzy on the actual details) | 19:11 |
| somlo | and e.g. vexriscv takes raw litex interrupts, so for that the json2dts script is correct | 19:11 |
| somlo | on rocket, due to the PLIC, the numbers have to be incremented by 1 -- and that's something I'll have to figure out once I add Rocket support to json2dts (which is vaguely on my to-do list, but is definitely not something that's supported ATM) | 19:12 |
| somlo | so what Linux sees when running on rocket aren't the raw LiteX IRQ numbers | 19:13 |
| somlo | LiteX assigns (on the boards I've been using) IRQ 0 to the uart | 19:14 |
| somlo | but when building LiteX with Rocket, and loading linux, in my DTS I have | 19:15 |
| somlo | liteuart0: serial@12009000 { | 19:15 |
| somlo | compatible = "litex,liteuart"; | 19:15 |
| somlo | reg = <0x12009000 0x100>; | 19:15 |
| somlo | interrupt-parent = <&L1>; | 19:15 |
| somlo | interrupts = <1>; | 19:15 |
| somlo | }; | 19:15 |
| somlo | and I *think* that's because there's also: | 19:16 |
| somlo | L1: interrupt-controller@c000000 { | 19:16 |
| somlo | #interrupt-cells = <1>; | 19:16 |
| somlo | compatible = "riscv,plic0"; | 19:16 |
| somlo | interrupt-controller; | 19:16 |
| somlo | interrupts-extended = <&L4 11 &L4 9 &L14 11 &L14 9 &L24 11 &L24 9 &L34 11 &L34 9>; | 19:16 |
| somlo | reg = <0xc000000 0x4000000>; | 19:16 |
| somlo | reg-names = "control"; | 19:16 |
| somlo | riscv,max-priority = <7>; | 19:16 |
| somlo | riscv,ndev = <8>; | 19:16 |
| somlo | }; | 19:16 |
| somlo | (which comes from rocket's chisel-elaborated dts, generated alongside the verilog code) | 19:17 |
| somlo | and which I've got to somehow cut'n'paste from when adding json2dts support to litex :) | 19:18 |
| geertu | somlo: Tried oirq.args[0]++ in of_irq_get(), but it doesn't help | 19:30 |
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| somlo | geertu: then it's probably in the gateware, somewhere... | 20:17 |
| jersey99 | _florent_ .. this is the example I am talking about FYI. https://pastebin.com/SrSPeibF | 20:39 |
| tpb | Title: test sim litex - Pastebin.com (at pastebin.com) | 20:39 |
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