Friday, 2022-09-16

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slagernateI can't seem to get the software/demo working on a crosslink-nx eval board. litex_term is hanging when I try to upload anything. Same behaviour when I try e.g. the wishbone tool on this [icebreaker-litex tutorial](https://github.com/icebreaker-fpga/icebreaker-litex-examples) (although at least in this case I am getting `screen /dev/ttyUSB1 115200`10:00
slagernateto work. Can someone share or point me to an example crosslinknx setup? Kind of disappointed how difficult this has been.. was getting similar errors as this closed issue, https://github.com/enjoy-digital/litex/issues/814, which took a while to overcome.10:00
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minutei have the VideoFrameBuffer base set to 0x50000000. my memory goes from 0x40000000-0x80000000. i see a semi random pixel pattern on screen. but if i run a mem_test 0x50000000 0x100000, for example, there's no change. i think that the LiteDRAMDMAReader is somehow reading a different location. what could be the issue? 10:47
minutei can read video_framebuffer_dma_offset and i see it is cycling.10:48
minuteand the video_framebuffer_dma_base is > 0xf0009800  00 00 00 5010:49
minuteif i do mem_copy 0x50000000 0x40000000 0x100000 i also see no change on screen10:50
minutebut mem_read 0x50000000 shows all 0xff now, so def. the content has changed10:51
minuteis there some kind of mmu remapping involved so that i have to give the videoframebuffer a different address than the physical memory address, _florent_ ?10:51
minutei'm building vexriscv with --cpu-count 1 --with-coherent-dma10:51
minuteif i do mem_write 0xf0009800 0x40000000 to change the dma base address, i can see different pixel content, but instead of all white it is just a different semi-random pattern (looks like uninitialized memory). so the base address does _something_, but does not point at the expected memory address10:55
minuteaha, mem_write 0xf0009800 0x10000000 gives me all white!10:55
minuteso the video dma base has to be 0 if it has to read from the start of dram10:56
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gatecatslagernate: unfortunately, this seems like it's probably a problem somewhere in the oss stack - testing with the evn board radiant works but oxide doesn't12:11
gatecatI will try and investigate but that is unlikely to be before next week as I'm heading out for some time afk fairly soon12:11
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gatecatslagernate: as a workaround for now, using picorv32 instead of vexriscv works12:17
gatecat(I think the problem might be somewhere in memory inference and related to the vexriscv caches but don't hold me on that one, still doing some investigation)12:17
gatecatslagernate: one last notif I promise :D if you want to try living on the wild side vexriscv hopefully works too with the patch in this last comment: https://github.com/YosysHQ/yosys/issues/3416#issuecomment-124931711812:44
gatecatI'm building the SoC from litex-boards with `python ~/litex-boards/litex_boards/targets/lattice_crosslink_nx_evn.py --toolchain oxide --build` for reference12:45
MoeIcenowyBTW I saw RocketChip tagged 1.4 today13:17
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somlomaybe it's time for an update to `pythondata-cpu-rocket` :)14:08
somloI was planning on that before diving into trying to debug Fedora booting on litex+rocket, but $DAYJOB keeps getting in the way...14:09
minutethere's no linux driver for litex i2s yet, correct?14:30
somlominute: this is the most up to date list of out-of-tree litex drivers I'm aware of: https://github.com/torvalds/linux/compare/master...litex-hub:linux:litex-rebase14:50
minutesomlo: thanks!14:50
somloI try to keep things up to date w.r.t. the linus tree here: https://github.com/litex-hub/linux/tree/litex-rebase14:52
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slagernategatecat: sadly, litex_term is still hanging for me even when using picorv also, likely this is a simple mistake of mine, but when using radiant as toolchain, synpwrap is failing with `Fail to run synpwrap -prj lattice_crosslink_nx_evn_impl_synplify.tcl -log lattice_crosslink_nx_evn_impl.srf` and `@E| Mal-formed command line - please check for extra23:19
slagernatequotes in macro specification'23:19

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