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| keesj1 | _florent_: do you know ... what tutorial to follow? | 07:04 |
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| _florent_ | keesj1: The bare metal demo should provide you a basis to do what you want. You can also probably have a look at: https://github.com/litex-hub/fpga_101/tree/master/lab004/firmware | 16:38 |
| cr1901 | _florent_: Do you have a few mins to answer basic litedram qs? If not, I'll be able to figure out the answer myself | 16:40 |
| cr1901 | asking you is just quicker :) | 16:40 |
| cr1901 | Such as: Does litedram start out under software control after push-button reset? Or is a CPU or bridge expected to put it into software mode? | 16:43 |
| _florent_ | cr1901: it defaults to HW control: https://github.com/enjoy-digital/litedram/blob/master/litedram/dfii.py#L70 | 16:45 |
| _florent_ | cr1901: and software is expected to put it in software control mode when required | 16:46 |
| _florent_ | cr1901: previously it was software control by default | 16:46 |
| _florent_ | but this has been changed to simplify simulation | 16:47 |
| _florent_ | https://github.com/enjoy-digital/litedram/commit/f3f89ed8d101fc021e1ad3f147a4bc5120c557c5 | 16:47 |
| cr1901 | Hmmm, okay... so that means nominally DRAM should "just work" after pushbutton reset | 16:47 |
| cr1901 | and if it doesn't, then I should put it under software control and play w/ dram control registers via litex_cli until things "just work"? | 16:48 |
| _florent_ | DRAM requires an initialization, that is done by the software by default with LiteX | 16:52 |
| cr1901 | Is using litex_cli supported for doing the initialization (just for testing that litedram is working? I saw a BIST core as well) | 16:53 |
| _florent_ | do it will not work without the initialization for SDR/DDR/DDR2 and calibration is also also required for DDR3/ DDR4 (and recent standards) | 16:53 |
| cr1901 | Ahhh okay, I thought the initialization was to _optimize_ the core operation, not necessarily required just for testing | 16:54 |
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| _florent_ | it can be done over litex_server with python scripts, but this is not integrated in the repository | 16:55 |
| _florent_ | this gist can be useful: https://gist.github.com/enjoy-digital/529a4d9994f0cc95e45382e4eb253b09 | 16:56 |
| cr1901 | That's fine, no need to integrate | 16:56 |
| _florent_ | https://gist.github.com/enjoy-digital/529a4d9994f0cc95e45382e4eb253b09#file-test_sdram_init-py-L18-L27 | 16:56 |
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| _florent_ | LiteDRAM can generate the init sequence in python: https://github.com/enjoy-digital/litedram/blob/master/litedram/init.py#L1021 | 16:57 |
| _florent_ | this is what is used by the scripts I just provided before | 16:58 |
| cr1901 | I have a connection to litex_server already, I've just forgotten how to talk to it directly (aside from litex_cli) | 16:58 |
| cr1901 | In any case, thanks, this should help very much | 16:58 |
| cr1901 | I'm trying to get Gowin internal DRAM working on a design w/o a SoC | 16:59 |
| _florent_ | with litex_server in place, it's very easy to write/read registers: | 17:08 |
| _florent_ | by looking at https://github.com/enjoy-digital/litex/blob/master/litex/tools/litex_client.py#L97-L147, you'll have different example for registers/memories, etc... | 17:08 |
| cr1901 | Oh, RemoteClient is exported/intendded for external code to use? | 17:13 |
| cr1901 | Anyways, tyvm for the help/hints | 17:16 |
| _florent_ | yes, you can even run multiple scripts/RemoteClient connected to the same LiteXServer, hardware access will automatically be shared | 17:17 |
| cr1901 | Neat :o! I know litex_server has existed in some form since... well, 2015 at least when I started contributing. But I've since forgotten how to use most of its functionality :P | 17:19 |
| cr1901 | But looks like, as w/ much of LiteX, it has gotten a lot better over the years | 17:19 |
| cr1901 | Btw, I know the gateware works because I can talk to the LEDs via UART/litex_server :P. So I've eliminated that problem | 17:20 |
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