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| Guest76 | Hi, Is there any examples of how to use GPIO with litex? | 05:53 |
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| Guest76 | Hi, Is there any examples of how to use GPIO with litex? | 06:56 |
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| Shatur | Is it possible to add my own ip core to simulation in litex_sim? If yes, how? | 10:44 |
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| _florent_ | Shatur: Adding cores to litex_sim is similar than adding core to a regular design, you can also follow the wiki for this. The main restriction is that the core will have to be supported by Verilator. | 13:28 |
| Shatur | _florent_: Sorry for a stupid question, but where I can find a target for it? For real hardware I see targets in boards directory. Is there something like this I can modify fo litex_sim? | 13:39 |
| Shatur | Oh, there is litex/litex/tools/litex_sim.py, I need to modify it? | 13:59 |
| _florent_ | Shatur: yes | 14:12 |
| _florent_ | that's the equivalent of the targets | 14:12 |
| Shatur | Thank you! | 14:14 |
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| jevinskie[m] | Shatur: it’s pretty simple. Here is an extension of serial2tcp that adds framing via length encoding https://github.com/jevinskie/litex/commit/86a6d234a10db5ec58a6f08fd634d20218afa8a4 | 18:03 |
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| jevinskie[m] | Guest76: take a look at https://github.com/enjoy-digital/litex/blob/481857ad0a73c8fed7257bf028577413536c9caa/litex/tools/litex_sim.py#L288 | 18:04 |
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| Shatur | Anyone encountered the following error? rust-lld: error: section '.text.dummy' will not fit in region 'spiflash': overflowed by 18446744073675997184 bytes | 18:15 |
| Shatur | I trying to build my "hello world" firmware for svd and memory files from litex_sim | 18:16 |
| Shatur | Here is the parameters I used: litex_sim --csr-svd=hal/litex_sim_pac/soc.svd --memory-x=hal/litex_sim_pac/memory.x --with-spi-flash --cpu-variant=minimal | 18:17 |
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