Tuesday, 2022-03-01

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amstanis there a cool dev board that has USBC/Thunderbold/PCIe on it?04:58
amstanso i could unify it with my computer's memory04:59
CarlFK_florent_: https://github.com/timvideos/litex-buildenv/blob/master/Makefile#L170  MAKE_CMD=\ $(PYTHON) -u ./make.py \05:36
CarlFK                --platform=$(PLATFORM) \                 --target=$(TARGET) \ ...05:36
CarlFKgiven the $params any guess as to what might work? 05:37
CarlFKguess = dont' spend much time as I may be the only person that uses this to verify the parts still work05:38
CarlFKjust because something stops working does not mean it needs to be fixed 05:38
mithro@CarlFK The newer version of that tutorial is https://github.com/timvideos/litex-buildenv/wiki/HowTo-LCA2018-FPGA-Miniconf-VexRiscv-Renode05:40
CarlFKmithro: is there any point to fixing the old one?06:25
mithroCarlFK: Not really, unsure if the new version is worth fixing as LiteX BuildEnv should be retired sometime....06:41
mithrohttps://github.com/litex-hub/linux-on-litex-vexriscv is a pretty good replacement for the Linux stuff06:41
CarlFKthe new version has the same error 06:43
mithroLog a bug and someone from Antmicro might take the time to fix, but don't count on it06:43
CarlFKhttps://github.com/timvideos/litex-buildenv/issues/751  06:50
mithro@CarlFK Feel free to add a "me too" and a log which is easily searchable?06:51
CarlFKk06:51
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cr1901_florent_: Are any of the current cores in litex written in Amaranth?16:37
cr1901(Under the soc/cores directory. I know minerva CPU is amaranth)16:37
* cr1901 misses when he knew LiteX enough that he could create a SoC in an hour lol16:57
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tntAny clue what would cause the pcie core to go to Polling.Compliance ?20:01
tntto give a little of context: this happens when loading a new bitstream when the machine is already booted and only if the machine was booted with a bitstream already loaded. Also if I reboot the PC, then the core will sync just fine (i.e. leave Compliance and go through training).20:03
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_florent_cr1901: in litex directory, there is only Minerva for now. It could also be interesting to reuse properly integrate Luna in the future20:24
_florent_tnt: sorry I saw your interesting results in the issue but haven't been able to have a closer look yet20:27
tntTBH after the change I made I think the issue might be in the BIOS or ACPI tables.20:28
_florent_tnt: Regarding the filtering of the Clk with the reset, I added it on 7-series since was required on a custom hardware, but we should maybe make it optional20:29
tntWhen the PC boots without cards, the bios doesn't init anything and I have to do it myself, that's fine. But I guess when it detects a cards, it must start some monitoring process or something and when the link is lost it doesn't restart properly.20:30
tnt_florent_: What I was thinking was to possibly add a small reset counter block so that when the external reset is released, it re-enables the clock but keeps the internal reset asserted for a bit longer.20:31
tntAlthough TBH ATM the way it works is "good enough" for my application, it's mostly a curiosity as to why it doesn't behave.20:32
tntWhat's a bit more annoying is that x8 doesn't work.20:33
_florent_tnt: Sorry I'm not sure to remember or find the behavior in the issue with x8? The board is not seen at all with lspci?20:35
tntit enumerates fine and --ident works fine. But dma test just hangs.20:37
tntI'll re-check tomorrow, and open a new issue about it with the tests / behaviors I observe.20:37
_florent_ok, if you can also share the pcie_usp_support, I'll have a look20:43
tntWhat do you mean ? I use the pcie_usp_support.v is in the litepcie repo.20:50
tntOr did you mean the .xci ?20:51
_florent_tnt: I need to have a look but the adaptation of pcie_usp_support is probably different between the x4 and x8 21:02
tntyes it is.21:04
tntBut there is a x8 version in the repo. I didn't write it.21:04
_florent_ok that's good then. I'll do some verification in the one present in the repository21:28
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