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| cr1901 | mntmn: Litex used to be that "each WB peripheral got a 256MB chunk of address space". This is quite wasteful if you want a lot of Wishbone peripherals, so the logic got changed to dynamically allocate addr space. | 01:30 |
|---|---|---|
| cr1901 | Maybe the autologic needs some tuneup | 01:30 |
| cr1901 | 0x7e9000=8294400 bytes, so that doesn't seem to be a problem by itself | 01:31 |
| mntmn | cr1901: yeah, the litevideo framebuffer address is hardcoded in integration/soc.py or sth | 01:31 |
| cr1901 | I thought _florent_ recently soft-deprecated litevideo | 01:31 |
| cr1901 | Maybe that was one of the reasons | 01:31 |
| mntmn | no idea | 01:32 |
| cr1901 | Anyways, litex should auto allocate addr space, so w/o any other info yea this sounds like a bug :D | 01:32 |
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| _florent_ | cr1901: in fact Linux-on-LiteX-Vexriscv is using the new Video Out core (that replaces the LiteVideo one), the issue mntmn has is more related to address definitions that are not flexible enough for now. The best for now is indeed probably to move the default framebuffer address. | 08:03 |
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| mntmn | _florent_: alright, thanks for confirming! | 09:20 |
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| nickoe | ok,got recovered from the hardrive failures | 18:52 |
| nickoe | But it oes look like I can run the demo.bin app if I build it specifically for the target ... IIRC earlier I men in april it was portable between my simulation and target | 18:53 |
| nickoe | now it is not portable b etween two simulations that are supposed to be basiscally identical and target.. | 18:53 |
| nickoe | I wonder whats up | 18:53 |
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| nickoe | When using SPI SDCARD are the bios commands for the SD not supposed to work? | 19:04 |
| nickoe | It appears they are only compiled in when sdcore is available which is no the case with add_spisdcard only with add_sdcard in soc.py | 19:05 |
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| nickoe | If I start a simulation wiht "litex_sim --with-etherbone " I can sorta connect to it with "litex_server --udp --udp-ip=192.168.1.51" and run stuff with the litex.RemoteClient as on https://github.com/enjoy-digital/litex/wiki/Use-Host-Bridge-to-control-debug-a-SoC, | 22:59 |
| nickoe | BUT can I also push the application code onto it as weith litex_term? It only appaers to support uart or jtag | 23:00 |
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