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sajattack[m] | <sajattack[m]> "assuming whatever is wrong..." <- I think something is wrong with bios of my soc... this uart also gives no output for me and trying to close the terminal I opened it on hard-locked my pc | 03:38 |
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sajattack[m] | or the hardware | 03:42 |
sajattack[m] | <_florent_> "ilia__s: nice PR, I'll test it..." <- I managed to get this to work by using my september soc with this branch's drivers `[LXTERM] Upload complete (185.6KB/s).` | 04:10 |
sajattack[m] | much better than my 8KB/s previously | 04:10 |
sajattack[m] | well done ilia__s | 04:11 |
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_florent_ | sajattack[m], ilia__s: I confirm this also works correctly on my setup :) | 09:12 |
_florent_ | sajattack[m]: With some tweaks to the litex_term parameters, the upload speed can also be increased up to ~600KB/s | 09:13 |
_florent_ | https://www.irccloud.com/pastebin/59u7RMpv/ | 09:15 |
tpb | Title: Snippet | IRCCloud (at www.irccloud.com) | 09:15 |
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somlo | _florent_: upstream opensbi now has support for LiteUART: https://github.com/riscv-software-src/opensbi/commits/master -- which means LiteX/Rocket works out of the box, and LiteX/Vexriscv only needs to deal with the interrupt controller bits as a separate platform thing | 16:45 |
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somlo | * LiteX/Rocket works out of the box (sans FPU emulation, which is a very orthogonal, and somewhat philosophical issue) :D | 16:46 |
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_florent_ | somlo: Great, thanks for handling this. I'll also try to switch Linux-On-LiteX-VexRiscv to it soon. | 17:19 |
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