Wednesday, 2021-11-03

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leonsjersey99: actually, I tried to reproduce my issue with the failing ARP and UDP port today and, with all of the patches included it just works now! Even the ARP requests (which used to cause trouble with UDP but not with ICMP, that was always a bit odd)10:38
leonsIt's really important to pass dw=64 everywhere though. Maybe that could be the issue?10:38
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jersey99leons I really only have 1 place to pass the dw, for the UDPIPCore, and that looks good. I have a few questions regarding the udp user_port interface now: 1. The length is still in bytes, correct? 2. Is the last_be now expected to be asserted?17:35
leonsI think the length is still in bytes, yes. And you should assert last_be, but only when last is also asserted. For all other bus words last_be should be 017:40
jersey99Thanks, all as expected!17:57
leonsjersey99: right, for the LiteEthUDPIPCore there's only a single dw parameter. I had previously instantiated the different components myself and messed up the dws 🙂18:17
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jersey99leons and _florent_ The branch works on KC705 for me now. I didn't test it at line rate, but I get the data that I push on the UDP port, onwards!21:25
leonsThat's really awesome21:25
leonsIt probably doesn't work at line rate, there's still some delays created by for instance the preamble inserter (1 clock cycle between packets) and the ARP table lookup also takes some cycles even if the cache is hot. I'll work on this further in the coming days/weeks. Appreciate any support!21:31
geertusomlo: yes, I replaced linux-on-litex-vexriscv/images/Image by a symlink to arch/riscv/boot/Image in my linux-riscv-orangecrab build dir21:32
geertusomlo: btw, I guess current litex-rebase doesn't build for vexriscv, and you need to apply the patch for irq-litex-vexriscv I emailed you? ;-)21:34
leonsjersey99: can you by chance share how you instantiate the 10G PCS/PMA core? I think I know where I went wrong, I was trying to get the ten_gig_eth_pcs_pma instantiated on UltraScale+, but that platform is unsupported by that core. I suspect your using the xxv_ethernet core instead which supersedes it (called 10G/25G High Speed Ethernet)?21:36
jersey99Yes exactly.21:36
jersey99  .. leons21:38
jersey99that is the scratch project for this21:38
jersey99I generated the .xci with a .tcl ..21:39
jersey99but I don't see the .tcl anywhere :)21:39
jersey99nvm, maybe I just used the ip gui21:40
leonsOh, but that seems to use the ten_gig_eth_pcs_pma, right? Not xxv_ethernet. Which is fine for Kintex-7 but not USP 🙂21:42
jersey99Yes, so far this is the platform I tested #88 on21:42
jersey99The xxv is instantiated in VHDL, and not on a public repo. I can email you the file in a bit21:44
leonsOh, okay. I was asking because I was hoping you had a way to instantiate xxv_ethernet with multiple SFPs with a shared PLL, that would've been an easy way out haha21:44
leonsAh, don't worry about it. I would want to publish it under BSD-2 so if it's closed I'll happily work my way up from the Xilinx example instantiation21:45
jersey99I only instantiate 1 core21:45
leonsOh, okay, that makes sense. Thanks nonetheless!21:46
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somlogeertu: thanks!22:24
somlogeertu: I applied and squashed your patch:
somlogeertu: sorry, google threw your email into the spam folder, so I didn't see it earlier22:25
somlonote to self: seriously start looking for an alternative imap+smtp hosted email service22:26
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