Sunday, 2021-10-24

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shenki_florent_: thanks for the suggestions11:20
shenki_florent_: the sim worked fine with the toolchain I was using (Debian's cross compiler)11:20
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shenki_florent_: but the fpga needed the buildroot toolchain. with that the bios worked for me11:21
shenki_florent_: i'll do some investigation as to why that is11:22
_florent_shenki: Thanks, that's strange to observe a difference between the simulation and the board on this. If you find something please let us know11:51
_florent_somlo: For mor1kx, I'll have a look tomorrow on my dev machine11:52
_florent_somlo: but there is indeed probably something wrong with the duplicate gcc_triple attribute/method11:53
_florent_thanks to navan93 we now also have a CI test of the different RISC-V CPUs, I'll also try to spend time to also enable it for Microwatt/LM32/Mork1x. This will also be a way to ensure we provide valid toolchains for these CPUs.11:57
cr1901_florent_: I've been thinking more re: the litex build... what I actually want is not necessarily meson support, but more parallelism when building picolibc with the rest of litex. The software is now 1000+ files to compile from a clean build! 1/212:39
cr1901As a compromise, would you accept a feature for (s)ccache support?12:39
cr1901I already tried it locally/it works, it's not many lines. But if you want to override, that's fine too12:40
_florent_cr1901: If you already have a proof of concept for this, I would be happy to review it/test it12:46
cr1901_florent_: Okay lemme make the proof of concept applicable to besides my machine only :)12:54
cr1901_florent_: Strangely sccache is slower on my machine, but the PR works. I think management engine doesn't like the riscv toolchain. Attempting more tests13:28
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cr1901_florent_: Some measurements. Halves the build times on Linux, no real effect on Windows: http://gopher.wdj-consulting.com:70/paste/0f17bf34-90eb-4f0c-a26c-834030529e5e.txt16:20
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