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| mc6808 | Another question: has anyone looked at integrating the Efinix FPGA toolchain? We are going to evaluate their devices and would like to do this with Litex | 06:20 |
|---|---|---|
| _florent_ | mc6808: I think I also got the issue when doing something similar on the Butterstick last week (also over 1Gbps Ethernet link) | 06:26 |
| _florent_ | mc6808: This could be related to https://github.com/enjoy-digital/litex/issues/1003 that increases resource usage and could degrade timings | 06:26 |
| _florent_ | I'm going to look at this | 06:26 |
| _florent_ | mc6808: Otherwise for Efinix FPGA, _franck_ has been doing some evaluations recently for a client, it's still not merge in LiteX but I'm planning to merge it soon | 06:29 |
| _florent_ | It's available here: https://github.com/fjullien/litex/tree/efinix | 06:29 |
| _florent_ | https://github.com/fjullien/efinix_litex_board | 06:30 |
| _florent_ | Their approach is a bit different than other vendors and all primitives are considered external to the design (similar to ASIC with the digital core + an IO pad ring), so this complicate a bit the integration in LiteX | 06:32 |
| _florent_ | but _franck_ has been able to get some simple first SoCs working with CPU/RAM/ROM/1Ggps Ethernet | 06:32 |
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| tnt | _franck_: oh ok, I thought it was a file entirely generated by xilinx tools but looks like it's (at least partially) manually customized. I'll leave it as is then :) | 08:50 |
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| mntmn | hmm i'm trying to add "i2c" in my soc_capabilities in make.py of linux-on-litex-vexriscv. but it fails with: litex.build.generic_platform.ConstraintError: Resource not found: i2c:0 | 14:08 |
| mntmn | my goal is to use i2c tools from the linux userland | 14:08 |
| mntmn | "i2c", 0 is defined in the _io array in the platform .py | 14:12 |
| mntmn | oh i put in some print statements and i see that i2c is already taken by something else | 14:15 |
| mntmn | ah it was already set up in the target .py, that's why! | 14:17 |
| _florent_ | mntmn: indeed, I already added it in the target | 14:36 |
| _florent_ | mntmn: if you want to check it, you can use i2c_scan command from the BIOS | 14:37 |
| mntmn | for some reason i2c commands are not in the bios generated via linux-on-litex-vexriscv, i guess i need to enable that somewhere | 14:37 |
| _florent_ | the I2C submodule has to be named "i2c" to be enabled in the BIOS, with "i2c0" as used in linux-on-litex-vexriscv, it will indeed not be enabled | 14:44 |
| _florent_ | we should improve this | 14:44 |
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| mntmn | _florent_: ok, got it. one more thing: where is the best place to increase linux,initrd-end ? | 14:59 |
| mntmn | i have noticed that a bit bigger cpio files fail to load | 15:00 |
| _florent_ | mntmn: you can increase initrd_size: https://github.com/enjoy-digital/litex/blob/master/litex/tools/litex_json2dts_linux.py#L69 | 15:07 |
| _florent_ | https://github.com/enjoy-digital/litex/blob/master/litex/tools/litex_json2dts_linux.py#L15 | 15:07 |
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| _florent_ | called here in linux-on-litex-vexriscv: https://github.com/litex-hub/linux-on-litex-vexriscv/blob/aa2e867ec2cef85f6d6166b954e143017a30a777/soc_linux.py#L187 | 15:11 |
| mntmn | _florent_: aha, thank you! | 15:13 |
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| mntmn | hmmm, trying to understand why loading the .cpio over network would fail if it's bigger than ~24MB | 15:40 |
| mntmn | it does not appear to be the linux,initrd-end setting in dts... | 15:41 |
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| mntmn | ah, it's because of 512 byte tftp block size :/ | 16:31 |
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| _florent_ | mntmn: interesting, for now you can probably split it on your tftp server and add multiple entry in the boot.json | 17:30 |
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| mc6808 | _florent_: thanks for the efinix pointers and merging this overnight (for me) | 22:02 |
| mc6808 | _florent_: also thanks for the pointer to the fifo regression that may be the etherbone issue and merge of the fixes from #1003. I tried uartbone yesterday and go the same symptoms which had me stumped. I'm updading to master now and will report back | 22:03 |
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