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leons | Is it even realistic to see a performance increase when building a verilated simulation with multiple threads? I have only seen it get significantly slower the more threads I give it :) | 05:57 |
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Shilpa | I am new to Litex vexriscv. How can I test an example in the bench directory without hardware, I mean to generate a VCD file. I don't know the command. Testing using the command python3 -m unittest test_serwb_core.py failed due to error | 13:41 |
Shilpa | For inter chip communication, liteiclink bench directory | 13:42 |
Shilpa | Please help | 13:45 |
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