Thursday, 2019-06-20

*** tpb has joined #litex00:00
*** tweakoz has quit IRC02:45
*** tweakoz has joined #litex02:49
tpbTitle: Perf-V: An FPGA based RISC-V developer board, which costs US$79 - News (at
*** rohitksingh_work has joined #litex04:50
*** ambro718 has joined #litex06:12
*** ambro718 has quit IRC07:06
DoluMaybe the best would be to have a good "system on module" kit, and some good mother boards to plug it in ? with the freedoom and ease to create new motherboard without unsolderable BGA chip ?10:46
DoluAlso for the SPI ethernet modules, it work, quite slow XD, 1 Mb/s for the ENC28J60-H, 2Mb/s for the W550010:49
Dolutested with iperf310:49
*** tweakoz has quit IRC10:50
Dolulooking at the waves, there is a tonne of SPI zigzag between each real payload transfer12:17
*** rohitksingh_work has quit IRC13:52
daveshahHas anyone tried the debug VexRiscvs with LiteX Linux? I'm investigating a crash that only occurs after several megabytes of TCP transfer, probably related to the IRQ driver I've hacked in16:05
*** keesj_ has joined #litex16:07
*** Xark_ has joined #litex16:10
*** keesj has quit IRC16:11
*** Xark has quit IRC16:11
*** ambro718 has joined #litex16:14
daveshahNevermind, pretty sure this was just the old WFI bug, I forgot to pull new VexRiscv-verilog for a while (timing is better now too :))16:35
somlodaveshah: funny you should mention that, I'm currently trying to trace rocket's progress through the linux kernel16:37
daveshahIt seems to still be crashing16:37
daveshahAh, sounds like fun16:38
somloand the best I could come up with was sprinkling "mul zero, a1, a2" opcodes into the kernel source, and having rocket's verilog $fwrite something whenever that opcode is executed :)16:38
somloso I can tell if I made it that far or not...16:38
daveshahHehe, I'm just about to add some GPIO writes to the interrupt handling stuff16:38
somlostill not sure if it's going into an infinite loop, or if simulating a 64bit rocket is just *that* slow...16:40
somloIIRC, a bunch of the early-boot printk's get buffered somewhere, then plastered to the console once it is initialized; either I'm using the wrong console driver, or it takes more than 8 hours to get to that point :)16:41
daveshahthe previous linux on vexriscv had macros DBG and DBGMSG that directly wrote to the LiteX UART without going through printk infrastructure, printing file&line and an optional message16:46
daveshahwas very helpful for the early part of debugging16:46
*** RedMercury has quit IRC16:48
somloI think it's an ecall to the "emulator" for putchar/getchar, same as what the hvc0 console driver ends up using16:53
somloI was thinking of writing just that sort of macro (to also double-check that the ecall putchar thing even works with BBL on my setup)16:55
somlobut got sucked down the breakpoint bread crumb rabbit hole :)16:55
somlogood to know there already is a macro I can cut'n'paste, though -- thanks for mentioning it!16:56
tpbTitle: litex-linux-riscv/puts.h at master · antmicro/litex-linux-riscv · GitHub (at
somlooh, this is even lower level than the ecall mechanism, just MMIO register writes :)16:57
daveshahVery helpful16:58
daveshahYou can also just sprinkle DBGs around for a crude kind of tracing16:58
somlothe big plus here is that this will work on FPGAs, whereas my hack relies on the simulator17:00
daveshahYes, I was mostly working on FPGAs with that17:04
daveshahSeems like my VexRiscv issue was the old WFI problem, and I was just failing at git submodules17:04
daveshahFmax for VexRiscv is now 88MHz on ECP5 with nextpnr which is quite tasty17:05
Doludaveshah : I'm also in a debug phase of ethernet stuff (SPI). Now it seem all ok. Had issues with driver. but nothing from the VexRiscv side.18:09
DoluThere was issue with threaded interrupts18:09
DoluWhich kind of interrupts are you using ?18:09
Dolu(threaded ONESHOT)18:09
daveshahNot actually sure, tbh18:10
daveshahThis is the liteeth driver18:10
daveshahAlso took the old Antmicro vexriscv csr IRQ driver and updated the CSR values18:10
daveshahseems stable again now18:11
DoluI can take a look, where is it ?18:11
DoluAhhh now that you updated the VexRiscv it isn't crashing anymore ? (daveshah)18:12
daveshahYup, all stable18:12
DoluGreat :D18:12
daveshahIt was just the WFI bug18:12
DoluThat WFI freeze realy scared me XD18:12
DoluCatched it via FPGA logic analyser, hopefully that wasn't too complicated18:13
daveshahHaven't pushed this version yet, but if you are curious the liteeth driver is and the interrupt driver is but with new CSR values18:13
tpbTitle: litex-linux-riscv/litex_liteeth.c at nfs · daveshah1/litex-linux-riscv · GitHub (at
daveshah(that is still the old source tree)18:13
DoluThat 88Mhz fmax is on which speed grade and which VexRiscv config ?18:13
daveshahThe standard Linux one, not the Fmax one, on a 5G part18:13
Dolu This assertion is wrong (as far i understand stuff)18:16
tpbTitle: litex-linux-riscv/irq-vex.c at nfs · daveshah1/litex-linux-riscv · GitHub (at
DoluIt fall apart as soon you have threaded IRQ / ONESHOT18:16
DoluI just opened a mailing list thread about it :
tpbTitle: irq-sifive-plic + gpio-sifive break IRQF_ONESHOT (at
daveshahBack on the old core I had a lot of trouble getting the Maxim SPI-USB thing working18:17
daveshahThat used ONESHOT I think18:17
DoluLet's see if i'm right, or if i missed somehting18:17
DoluThen that's probably the issue18:17
DoluONESHOT active low  interrupt ?18:18
Dolu(not falling/rising)18:18
daveshahYep, I think that's what it was18:19
tpbTitle: linux/max3421-hcd.c at master · torvalds/linux · GitHub (at
DoluBasicaly the normal flow is : IRQ(mask(...)) -> threaded handle(...) -> unmask18:20
DoluBut with that bug, the interrupt is non stop trigerring : IRQ(...) -> IRQ(...) -> IRQ(...) -> IRQ(...) ->    and never getting to the threaded handle18:21
DoluAhh, hm, quite different than the W5500. so maybe that wasn't the issue for that case.18:21
tpbTitle: Perf-V Based on Xilinx Artix-7 FPGA RISC-V opensource (at
keesj_I hope it is open hardware .. I would really fancy that right now.18:56
futarisIRCcloudkeesj_: Yeah, I saw it yesterday. The high speed breakout seems useful.19:24
keesj_but then .. ecp5 also exists... I wonder how the serdeses compare (for ddr3 type applications)... I think I need to see daveshah's code19:44
keesj_futarisIRCcloud: it does not look very intimidating (like .. perhaps I can DIY a board like that)19:45
tpbTitle: USB2 Sniffer (at
*** Xark_ has left #litex20:47
*** ambro718 has quit IRC20:59
*** Dolu has quit IRC21:02
*** Dolu has joined #litex21:28

Generated by 2.13.1 by Marius Gedminas - find it at!