Tuesday, 2019-05-14

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tpbTitle: The Darsena Shield for Arduino (at mindchasers.com)01:32
tpbTitle: IPUS Limited : Products (at ipusltd.com)03:19
futarisIRCcloudIPS6404L-SQ-SPN is aroiund $103:19
tpbTitle: FreeRTOS for RISC-V RV32 and RV64 (at www.freertos.org)06:28
keesjhow is idelayctrl "combined" with idelay in litedram?09:11
keesjthe CRG create an idelayctrl (and but where is it used?)09:11
keesjthe warning I have when building arty (but also my target is ) WARNING: [Synth 8-350] instance 'IDELAYCTRL' of module 'IDELAYCTRL' requires 3 connections, but only 2 given [/home/why/projects/ddr3/litex/soc_basesoc_arty/gateware/top.v:9950]09:16
keesjlooking at the code indeed only the input clocks are used (no output signal)09:17
keesjdoes that mean that the idelaycontrol is perhaps not working(would ddr work without it?)09:18
keesjbtw yesterday I reworked a 400+ BGA and the thing worked!09:18
keesjhmm the third pin is just the ready pin...09:20
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_florent__keesj: the idelayctrl connections are not exposed to the fabric, so you just have to instanciate it and provide a 200MHz reference clock15:43
keesjI scanned the other warnings but did not find real bad stuff16:11
keesja lot of warning about not all ports being used16:11
_florent__yes, you can safely ignore these warnings16:26
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Dolu<3 https://risc-v-getting-started-guide.readthedocs.io/en/latest/linux-avalanche.html# <323:18
tpbTitle: Running 32-bit Linux on Litex/VexRiscv on Avalanche board with Microsemi PolarFire FPGA RISC-V - Getting Started Guide (at risc-v-getting-started-guide.readthedocs.io)23:18
DoluI'm just not sure why on some board it take so much time to boot. It probably need some investigation.23:23

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