Friday, 2019-05-10

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nrossiso I am trying to get the linux-on-litex-vexriscv going a on versa ecp5. However I am running into some trouble with both the prebuilt binaries and any self built binaries where the kernel seems to hang. It looks like it is hanging in the kernel on a BUG_ON in setup_bootmem where it checks if mem_size is 0.06:35
daveshahnrossi: can you post the full startup log?06:47
tpbTitle: litex-linux-vexriscv-log-prebuilt-binaries · GitHub (at
nrossioh sorry, that is with my built kernel. Though it looks exactly the same with the kernel image from the repo, just different size in bytes07:12
daveshahnrossi: just to double check, is your litex up to date?07:27
nrossidaveshah: i did just update it, I noticed an issue with the CSR mapping stuff. However it looks with a rebuilt bitstream and emulator.bin it boots. Just checking if it was something I had done wrong previously though07:29
nrossidaveshah: I think i traced the issue... TFTP.... it looks like the images are not copying correctly...07:33
daveshahnrossi: I've seen this too07:37
daveshahMaybe try a different tftp server07:37
daveshahI've seen the dnsmasq tftp server recommended here, although haven't tried it myself07:38
nrossihmmm, tftppy and atftpd seem to have issues. I did not know dnsmasq had a tftp server will have a look at that07:44
nrossidaveshah: no luck with dnsmasq, this makes me think its just packet loss on the network and the tftp client in the bios code does not handle that well?07:47
DoluJust one thing, how the address system work in litex ? because in the .py, i can see that the ethernet mac is mapped at 0x30000000, which isn't an IO region of the CPU08:59
DoluFor me it is suspicious, and can be the source of the ethernet issue, unless there is some kind of address MSB trickery + software accessing the ethernet via 0xB09:02
xobsDolu: I have absolutely no context here, so take this with a grain of salt, but I seem to recall in litex, the MSB indicates whether an access is cached or not.09:17
DoluIt would make sense09:17
DoluRight that's it09:26
Doluso that's fine, that's not the issue here09:26
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_florent__nrossi: can you try to load the images over serial? (it's a bit slow, a few minutes, but then we'll see if it's related to the TFTP or the bitstreams/images)10:14
tpbTitle: GitHub - enjoy-digital/linux-on-litex-vexriscv: Experiments with Linux on LiteX-VexRiscv (at
_florent__btw, the prevuilt bitstreams/images are now there:
tpbTitle: GitHub - enjoy-digital/linux-on-litex-vexriscv-prebuilt: Prebuilt bitstreams / linux images for litex-on-litex-vexriscv repository (at
_florent__and how to use them:
tpbTitle: GitHub - enjoy-digital/linux-on-litex-vexriscv: Experiments with Linux on LiteX-VexRiscv (at
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nrossi_florent__: serial loading works and kernel boots (with the prebuilt binaries you linked above)11:05
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_florent__nrossi: thanks, i'll do more tests with tftp12:18
nrossi_florent__: I added some instrumentation to the bios code to crc the transferred files...  it looks like they transfer fine, but now it seems to hang just before booting (and part of the uart printed text is missing)12:20
_florent__nrossi: when doing tftp, are you using the exact same images you were using with serial?12:22
nrossi_florent__: yep, the same prebuilt ones from the repo you linked12:23
_florent__nrossi: i just tested with the prebuilt bitstream and images, it works on my machine12:58
_florent__nrossi: are you also using the provided bitstream?12:58
nrossi_florent__: just tested it and it works (tried a few boots). However I did have issues earlier, so not sure if it works consistently13:02
nrossi_florent__: although i did notice that with the most recent litex the build now fails with csr already mapped errors13:03
_florent__nrossi: ok thanks, sorry a commit was not pushed, it's done now and should build correctly (you also need to update litedram)13:59
_florent__daveshah: just for info, i fixed the reported memory size for the versa13:59
daveshah_florent__: thanks!14:45
_florent__ :)17:20
somloCongrats!!! This is a huge step forward for those of us who care about actually being in control of our own computers!17:37
somlonow, on to 64bit Linux, and maybe Fedora ;)17:38
_florent__this is also a good regression test for LiteX/LiteDRAM :)17:50
somloshould writing a 32'h0 to 0xe0000000 cause a reset, or should that only happen for specific bit patterns, e.g. 32'h01)?18:08
somloright now any write reboots (tested on vexriscv), but is that the desired behavior?18:09
somlo^any value, I mean18:09
somloI found the answer here:
tpbTitle: litex/ at master · enjoy-digital/litex · GitHub (at
somloit's *any* write to the register, regardless of the value...18:41
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