Tuesday, 2019-05-07

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futarisIRCcloudSo, I've got a ~1.2GB ext4 core-image-lsb-sdk rv32ima rootfs that I built using meta-riscv / openembedded... I guess I'll need to fix up the network driver / NFS or get litesdcard running in arty linux to test it on hardware.05:54
keesjthe ClockDomain() code remains magic to me08:13
keesjhow do I know the name of the clock ?08:13
_florent__keesj: by default the clock domain is "sys"08:14
_florent__by when you do something like this: self.clock_domaines.cd_foo = ClockDomain(), your clock domain will be called "foo"08:15
keesjmy code currently looks like this http://paste.ubuntu.com/p/PWWGywGfCn/08:15
tpbTitle: Ubuntu Pastebin (at paste.ubuntu.com)08:15
keesjself.clock_domains.cd_sys = ClockDomain()  defines the "sys" clock?08:16
_florent__ok so you have two clocks domain: sys and por08:17
keesjand I want to define a sys2x clock (the clk_bufio)08:17
_florent__you can just see clock domain as an object that encapsulate the clk and reset08:17
keesjbecause at line 85 ish I want to use sys and sys2x08:18
_florent__ok, then in your CRG, you need to create the sys2s clock domain08:19
keesjso .. line 86 becomes .. ClockSignal("sys") ?08:19
keesjOk .. I will try that08:20
_florent__and if in the CRG you connect clk_bufio to self.cd_sys2x.clk, line85 you can use ClockSignal("sys2x")08:21
keesjlike this http://paste.ubuntu.com/p/JPDKcj4D7N/08:26
tpbTitle: Ubuntu Pastebin (at paste.ubuntu.com)08:26
keesjit does compile :P08:27
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_florent__futarisIRCcloud: i merged you ULX3S support and tested on hardware: https://github.com/enjoy-digital/linux-on-litex-vexriscv/issues/508:39
tpbTitle: finish ULX3S support · Issue #5 · enjoy-digital/linux-on-litex-vexriscv · GitHub (at github.com)08:39
_florent__futarisIRCcloud: it's almost working, but the issue is not related to the board but with the actual minimum memory requirement:08:40
_florent__daveshah: can i merge your 2 dev branches? (linux_liteeth, buildroot_tweaks)08:50
daveshahGo ahead08:51
_florent__ok thanks08:52
daveshahbuildroot_tweaks is just some random niceties08:52
futarisIRCcloudOk. What does the kernel log say?08:52
daveshahliteeth stuff needs the interrupt stuff fixed, which I probably won't have time to do this week so feel free to take that08:52
_florent__futarisIRCcloud: the kernel log is here: https://github.com/enjoy-digital/linux-on-litex-vexriscv/issues/508:59
tpbTitle: finish ULX3S support · Issue #5 · enjoy-digital/linux-on-litex-vexriscv · GitHub (at github.com)08:59
DoluThis is probably the issue : https://github.com/enjoy-digital/linux-on-litex-vexriscv/blob/7ab77c974f8af07dfa13531e87d65d5f9cd5834d/buildroot/board/litex_vexriscv/litex_vexriscv.dts#L6309:00
tpbTitle: linux-on-litex-vexriscv/litex_vexriscv.dts at 7ab77c974f8af07dfa13531e87d65d5f9cd5834d · enjoy-digital/linux-on-litex-vexriscv · GitHub (at github.com)09:00
DoluAt least, part of it09:00
_florent__daveshah: yes i'll see if i can do that this week, for now i'm just trying to list the things to do09:00
_florent__Dolu: ah yes, that could explain things :)09:00
futarisIRCcloudmithro: minispartan6+ with Spartan 6 LX 25 should be able to run HDMI2USB in Linux.09:08
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_florent__futarisIRCcloud: at least minispartan6 Spartan6 LX25 runs linux: https://hastebin.com/etapuqabon.cs :)11:23
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keesjis there a nice way to geneate the analyzer.csv and csr.csv? I currently "hacked" the methods together11:47
keesjhttps://paste.ubuntu.com/p/Bsbh4XZGrv/ something like this11:48
tpbTitle: Ubuntu Pastebin (at paste.ubuntu.com)11:48
keesjand.. I do not feel confident about the soc.finalize() either11:50
keesjit works[tm]11:50
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_florent__keesj: i'm usually generating it while building the SoC with Builder, there is no nice way to generate it otherwise for now. Your hack seems fine12:18
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futarisIRCcloud_florent__ / daveshah / Dolu1990 / mithro / somlo / tinyfpga_ / xobs: https://twitter.com/GregDavill/status/112584609478769049623:42
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