Friday, 2019-05-03

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keesjpretty cool (mmu + linux)05:36
futarisIRCcloud_florent__: Good job. I'll try and test on my Arty 35T sometime soon.07:00
keesjyea it is pretty cool. but in the end I am here to not do linux stuff and least not on the software side. looking at how the mmu is implemneted .. really cool07:12
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_florent__keesj: you'll still be able to to do what you want with the hardware  but will also the flexibility of Linux/Software for things that are tedious to do in hardware :)07:37
keesjyea.. it is more ... I started as Java programmer back in the 90's and been doing down the software supply chain ever since. Still remember how exited I was to create my first kernel driver07:41
keesjgood old times07:41
keesjalso good old times fighting the MMU when porting Minix3 to ARM07:43
keesjhorray \o/ running running in sycn with ddr!09:44
keesjStill is it kinda strage my clock is fed through a DifferentialInput DIFF_SSTL135 but it looks like when no signal is present still somehow somewhere a clock is generated09:46
Dolu_florent__ I submited a fix to force the block ram inferation via attributes09:53
Dolu(in Vexriscv-Verilog)09:53
_florent__Dolu: thanks, i'll test this afternoon09:54
acathlaHeureusement qu'on sait tous quand à lieu ton afternoon ;)10:01
Dolu_florent__ For the LUT usage, the bad VexRiscv area usages are only due to Vivado moving logic through hierarchy. I force him to not use cross hierarchy optimisations, and with the linux-minimal setting and you SoC, VexRiscv is 2451 LUT :)10:10
DoluThe non-minimal linux config (the one you have actualy) would probably use about 200 luts more.10:10
Doluinstruction cache is reported as 31 LUT, data cache as 253 LUT XD (with atomic)10:11
_florent__Dolu: ok, regarding performance, is the linux-minimal equivalent to the linux one?10:12
DoluIt avoid all the unused CSR features, especialy in the machine mode.10:13
futarisIRCcloudWhich unused CSR?10:13
_florent__ok, are we going to need these CSR in the future?10:13
DoluFor the supervisor, it only provide scycle and sinstret.10:17
DoluI mean10:18
Doluthe linux-minimal remove the scycle and sinstret from supervisor capabilities, and delegate them to machine mode emulation.10:19
DoluSo, nothing which would sudently break compatibility with upstream linux,10:20
_florent__ok, so you also adapted the emulator code?10:20
DoluThe emulator code is already ready to handle linux-minimal required emulations10:21
tpbTitle: VexRiscv/main.c at master · SpinalHDL/VexRiscv · GitHub (at
DoluThat's not perfect as a RDINSTRET implementation, but for embedded FPGA stuff, i think that's good enough10:21
futarisIRCcloudSounds fine for a single core on a FPGA.10:25
_florent__Dolu: linux-minimal is working fine and resource usage is indeed reduced:
DoluCool :)11:19
keesj_florent__ your help is very much appreciated! you turned my week from missery to happynes11:35
keesjis there a way I can request a subsignal without first getting the signal ? e.g. my clock is currently on a pmod so I o resource.request("pmodb") and then do pads.clp11:48
keesjbut I need to use the same resource somewhere else11:49
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_florent__keesj: no, you have to request the full ressource for now12:30
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keesjI will do some refactoring. it does not really matter but I think I migh also have already worked around it before by doing something like bla = Pins("E12")13:31
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