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| lkcl | as95. kenneth: yes i don't (personally) like "competition", i find it... how can i express it... intimidating? yes, you have to go to the effort, only to find that you're not "selected", but if you think about it, this is no different from the commercial MPWs | 05:20 |
|---|---|---|
| lkcl | commercial MPWs have slots, when they get filled, you go into a queue for the next one. | 05:20 |
| lkcl | mithro took some time to explain it last month on the IBM India Power ISA Education Course i participate in: his Managers have agreed to back sky130 as an experiment | 05:21 |
| lkcl | if we - as a community - want more MPWs and want more MPWs on the smaller geometries, he needs to demonstrate that there is demand (that the experimental investment has proven so successful it should be expanded) | 05:22 |
| lkcl | on that basis, *not* submitting a design "because it might not be accepted" would mean that there would be no visible evidence for the sponsorship to be continued. | 05:24 |
| lkcl | i appreciate that's a leetle... indirect :) | 05:30 |
| F4PGASlackBridge | <kenneth.wilke> That's certainly a fair point. I do feel like I'm getting more interested in exploring that each day. The main hesitation for me is much more about lack of experience. I feel like I've got a decent footing with SystemVerilog at this point, but many other things to figure out as well | 05:31 |
| lkcl | yes, the difference between signals and wires and registers... | 05:32 |
| lkcl | oh if you encounter "variables" in VHDL, those are horribly confusing | 05:32 |
| F4PGASlackBridge | <kenneth.wilke> I have a hard time working up the patience to look at VHDL lol | 05:33 |
| lkcl | haha yeah. i found the microwatt source code to be amazingly readable, though, because it's written by people with software-engineering background | 05:34 |
| lkcl | it's like... got comments? :) | 05:34 |
| F4PGASlackBridge | <kenneth.wilke> That's certainly always helpful! I can't really say I've given it a fair shot, just that at a quick glance at VHDL and Verilog the latter appeared much simpler | 05:35 |
| lkcl | VHDL is basically ADA, so is more... robust, shall we say | 05:36 |
| lkcl | yosys only had SystemVerilog support added quite recently | 05:36 |
| lkcl | and if you overwrite signals multiple times, the simulators (particularly icarus verilog) can interpret that as non-deterministic behaviour | 05:37 |
| lkcl | two processes writing to the same Signal, iverilog "events" could have one of them written before the other, and then on the next cycle, the other process "wins" | 05:38 |
| F4PGASlackBridge | <kenneth.wilke> When I did a little CAPI experiment, I found the typedef keyword extremely friendly for sharing a chunk of data between virtual memory of a C program and the FPGA | 05:38 |
| lkcl | nice. | 05:39 |
| lkcl | do you have any references online to that? | 05:39 |
| F4PGASlackBridge | <kenneth.wilke> My "accelerator"s function was to XOR two buffers and save in a third, certainly did not merit the hardware lol | 05:40 |
| lkcl | :) | 05:40 |
| * lkcl found this https://suchprogramming.com/category/capi-development/page/2/ | 05:40 | |
| F4PGASlackBridge | <kenneth.wilke> But figuring out the memory ops was a fun journey | 05:41 |
| F4PGASlackBridge | <kenneth.wilke> That's the one | 05:41 |
| lkcl | wildcard imports, sigh. | 05:42 |
| lkcl | my heart sinks whenever i see wildcard imports, they stop contextual auto-deduction / autodidact learning stone dead | 05:43 |
| lkcl | BufferInterfaceInput and so on are part of CAPI? | 05:44 |
| lkcl | ah is this OpenCAPI by any chance? | 05:45 |
| lkcl | https://github.com/KennethWilke/capi-parity/blob/master/capi.sv | 05:45 |
| F4PGASlackBridge | <kenneth.wilke> I don't exactly recall, but I think it was OpenCAPI | 05:46 |
| * lkcl been meaning to explore OpenCAPI | 05:46 | |
| lkcl | ahhh :) | 05:46 |
| lkcl | ah excellent, i'll definitely bookmark this, thank you. that's really handy to have a well-documented explanation and exploration | 05:47 |
| F4PGASlackBridge | <kenneth.wilke> I'm glad it could be useful lol, I knew at the time I'd very quickly forget most of what I had learned | 05:48 |
| lkcl | been there :) | 05:49 |
| F4PGASlackBridge | <kenneth.wilke> I was trying to lure some of my coworkers into the HDL journey, but didn't succeed in encouraging anyone to give it a try | 05:50 |
| lkcl | yyeah you have to have a really good reason to consider it | 05:50 |
| F4PGASlackBridge | <kenneth.wilke> Which, I did kind of find that in my last role, which was appsec consulting for a couple years | 05:51 |
| F4PGASlackBridge | <kenneth.wilke> I think the infosec crowd is more willing to dig that deep, generally | 05:51 |
| lkcl | most people have given up to be honest, i find it really... interesting that software engineers exhibit a "resigned" attitude to ISAs | 05:51 |
| lkcl | but yes, security aspects (RowHammer) are where software engineers / programmers are waking up | 05:52 |
| lkcl | at least if your peripherals or parts of the design are implemented in an FPGA you can "fix" security issues | 05:52 |
| F4PGASlackBridge | <kenneth.wilke> We did some device security assessments, and I think given enough open source track an FPGA gives some incredible potential for misuse lol | 05:53 |
| lkcl | which goes a long way towards explaining why both Intel and AMD bought FPGA companies | 05:53 |
| lkcl | mmm true :) | 05:53 |
| lkcl | which, sigh, will be why Intel is highly likely to drop encryption on top of FPGA bitstreams | 05:54 |
| lkcl | as if that will help them *cough* master firmware key leaked *cough* | 05:54 |
| F4PGASlackBridge | <kenneth.wilke> One of the fun talks a colleague gave was "pin 2 pwn", which was bypassing secure boot with a sewing needle. Causing bad flash reads and hoping the device hits some failover debug prompt if I recall correctly. | 05:56 |
| F4PGASlackBridge | <kenneth.wilke> I told him we could time the interference really well with an FPGA! | 05:57 |
| lkcl | funny. i remember talking to someone online who had experience with using.. what was it... a directional EMP to deliberately cause bit-flips inside FFs/registers | 05:57 |
| lkcl | got a FF which says "nope, you can't write to that security-controlled memory area ZAP oh wait now you can" | 05:58 |
| F4PGASlackBridge | <kenneth.wilke> I admire the people that break things creatively :) | 05:59 |
| lkcl | it seriously freaks people out who think "hardware is categorically secure" | 05:59 |
| lkcl | hey fun as this has been i am keenly aware it's 6am at the moment here in the UK and i really should be horizontal | 06:00 |
| F4PGASlackBridge | <kenneth.wilke> Yeah, I enjoyed chatting with you, have a good one! | 06:01 |
| lkcl | appreciate the entertaining conversation. you too. | 06:01 |
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