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| marzoul | Hi, I'm continuing hacking in fuzzers for virtex7. | 21:38 |
|---|---|---|
| marzoul | Currently having an error at fuzzer005 database generation, about offset of some bits supposed to be 42 : | 21:38 |
| marzoul | tile_name CLK_HROW_TOP_R_X137Y286 database {'baseaddr': '0x00021B80', 'frames': 30, 'offset': 42, 'words': 18} | 21:38 |
| marzoul | tile_name CLK_HROW_TOP_R_X137Y338 database {'baseaddr': '0x00041B80', 'frames': 30, 'offset': 42, 'words': 18} | 21:38 |
| marzoul | tile_name CLK_HROW_TOP_R_X137Y390 database {'baseaddr': '0x00061B80', 'frames': 30, 'offset': 42, 'words': 18} | 21:38 |
| marzoul | tile_name CLK_HROW_TOP_R_X137Y442 database {'baseaddr': '0x00081B80', 'frames': 30, 'offset': 43, 'words': 18} | 21:38 |
| marzoul | Curiously, only the last one is having an extra +1 offset that I'm not sure how to interpret. | 21:38 |
| marzoul | Who did you say was the right person to talk to what to expect ?;-) | 21:38 |
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| adventure_uiuc | hey everyone, I am a student who is interested in playing around with FPGAs. We used Altera based FPGAs in class but I want to work with Symbiflow's open source toolchain. I'm wondering if it's somewhat straightforward to use Symbiflow with Spartan7 FPGAs, because it's more in-budget than the Artix-7 FPGAs. | 22:49 |
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